1. Field of the Invention
The present invention is related to silicon wafers and their manufacturing method, in particular, to technology suited to the manufacture of silicon wafers having a superior intrinsic gettering (IG) effect. Priority is claimed on Japanese Patent Application No. 2002-336690, the content of which is incorporated herein by reference.
2. Description of Related Art
Silicon wafers manufactured by processing a silicon single-crystal grown by pulling with the Czochralski (CZ) method contain many oxygen impurities. These oxygen impurities form oxygen deposits (referred to as Bulk Micro Defects: BMD) which give rise to dislocation and defects and the like. When these oxygen deposits are on the surface on which devices are formed, they cause increased leakage current and reduced oxide film withstand voltage and the like, having significant effects on the characteristics of the semiconductor device.
Conventionally, therefore a method as hereunder, wherein a DZ layer (Denuded Zone, i.e. a defect-free layer) is formed uniformly has been employed (see pamphlet International Unexamined Patent Application No. 98/38675). That is, the surface of the silicon wafer is rapidly heated to a temperature of 1250° C. or higher and quenched (Rapid Thermal Annealing: RTA) over a short period of time, in a prescribed atmosphere gas to form a high concentration of atomic vacancies (hereafter referred to as ‘vacancies’) within the interior of the silicon wafer. Furthermore, quenching the silicon wafer freezes the atomic vacancies. It is then heat treated at, for example, a temperature of 800° C. for four hours, after which it is then immediately heated to 1000° C. for 16 hours, to disperse the vacancies on the surface of the wafer to the exterior.
Moreover, conducting heat treatment at a temperature below the aforementioned temperature following formation of the DZ layer, forms and stabilizes oxygen deposits in the interior of the silicon wafer, forming a defect layer, and thus a process wherein a BMD layer having a gettering effect is formed is also adopted. Furthermore, other published documents include, for example, Japanese Unexamined Patent Application First Publication No. 2001-156074.
However, the following problems relating to the aforementioned heat treatment technology remain unresolved.
That is, a strong requirement exists for silicon wafers with a higher gettering capacity. However, raising the gettering capacity presents difficulties due to an increase in BMD size to between 50 nm and 200 nm.